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<div class="header">
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<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">Interrupt Functions<div class="ingroups"><a class="el" href="group__group__adcmic.html">ADCMic       (Delta-Sigma ADC with PDM microphone support)</a> &raquo; <a class="el" href="group__group__adcmic__functions.html">Functions</a></div></div>  </div>
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<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<p>This set of functions are related to ADCMic interrupts. </p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga50aef66098e540a452357c81e0f06687"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__adcmic__functions__interrupt.html#ga50aef66098e540a452357c81e0f06687">Cy_ADCMic_EnableInterrupt</a> (<a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> *base, uint32_t intrMask)</td></tr>
<tr class="memdesc:ga50aef66098e540a452357c81e0f06687"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the specified interrupt bit in the interrupt mask register.  <a href="#ga50aef66098e540a452357c81e0f06687">More...</a><br /></td></tr>
<tr class="separator:ga50aef66098e540a452357c81e0f06687"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad989e9e2543b9db8691cc90d485c49c4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__adcmic__functions__interrupt.html#gad989e9e2543b9db8691cc90d485c49c4">Cy_ADCMic_DisableInterrupt</a> (<a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> *base, uint32_t intrMask)</td></tr>
<tr class="memdesc:gad989e9e2543b9db8691cc90d485c49c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clears the specified interrupt bit in the interrupt mask register.  <a href="#gad989e9e2543b9db8691cc90d485c49c4">More...</a><br /></td></tr>
<tr class="separator:gad989e9e2543b9db8691cc90d485c49c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1866ca19f250374956f6ed2bb0a55f4f"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__adcmic__functions__interrupt.html#ga1866ca19f250374956f6ed2bb0a55f4f">Cy_ADCMic_GetInterruptStatus</a> (<a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> const *base)</td></tr>
<tr class="memdesc:ga1866ca19f250374956f6ed2bb0a55f4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the interrupt status of the specified channel.  <a href="#ga1866ca19f250374956f6ed2bb0a55f4f">More...</a><br /></td></tr>
<tr class="separator:ga1866ca19f250374956f6ed2bb0a55f4f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga51c3d5c6bdc5fef18119977ded174a28"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__adcmic__functions__interrupt.html#ga51c3d5c6bdc5fef18119977ded174a28">Cy_ADCMic_ClearInterrupt</a> (<a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> *base, uint32_t intrMask)</td></tr>
<tr class="memdesc:ga51c3d5c6bdc5fef18119977ded174a28"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clears the interrupt status.  <a href="#ga51c3d5c6bdc5fef18119977ded174a28">More...</a><br /></td></tr>
<tr class="separator:ga51c3d5c6bdc5fef18119977ded174a28"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga272790cd2069d78ddd1d436d31c7633f"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__adcmic__functions__interrupt.html#ga272790cd2069d78ddd1d436d31c7633f">Cy_ADCMic_SetInterrupt</a> (<a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> *base, uint32_t intrMask)</td></tr>
<tr class="memdesc:ga272790cd2069d78ddd1d436d31c7633f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the interrupt for the specified channel.  <a href="#ga272790cd2069d78ddd1d436d31c7633f">More...</a><br /></td></tr>
<tr class="separator:ga272790cd2069d78ddd1d436d31c7633f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ef98c24d5f9b40d34919521768bd99f"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__adcmic__functions__interrupt.html#ga8ef98c24d5f9b40d34919521768bd99f">Cy_ADCMic_GetInterruptMask</a> (<a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> const *base)</td></tr>
<tr class="memdesc:ga8ef98c24d5f9b40d34919521768bd99f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the interrupt mask value of the specified channel.  <a href="#ga8ef98c24d5f9b40d34919521768bd99f">More...</a><br /></td></tr>
<tr class="separator:ga8ef98c24d5f9b40d34919521768bd99f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae267e077a5ea40b9c6af3aa9a8658719"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__adcmic__functions__interrupt.html#gae267e077a5ea40b9c6af3aa9a8658719">Cy_ADCMic_SetInterruptMask</a> (<a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> *base, uint32_t intrMask)</td></tr>
<tr class="memdesc:gae267e077a5ea40b9c6af3aa9a8658719"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets an interrupt mask value for the specified channel.  <a href="#gae267e077a5ea40b9c6af3aa9a8658719">More...</a><br /></td></tr>
<tr class="separator:gae267e077a5ea40b9c6af3aa9a8658719"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae9309c0b0b44c696c3de3a79290ec641"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__adcmic__functions__interrupt.html#gae9309c0b0b44c696c3de3a79290ec641">Cy_ADCMic_GetInterruptStatusMasked</a> (<a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> const *base)</td></tr>
<tr class="memdesc:gae9309c0b0b44c696c3de3a79290ec641"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the logical AND of the corresponding INTR and INTR_MASK fields in a single-load operation.  <a href="#gae9309c0b0b44c696c3de3a79290ec641">More...</a><br /></td></tr>
<tr class="separator:gae9309c0b0b44c696c3de3a79290ec641"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Function Documentation</h2>
<a id="ga50aef66098e540a452357c81e0f06687"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga50aef66098e540a452357c81e0f06687">&#9670;&nbsp;</a></span>Cy_ADCMic_EnableInterrupt()</h2>

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          <td class="memname">void Cy_ADCMic_EnableInterrupt </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>intrMask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Sets the specified interrupt bit in the interrupt mask register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>The pointer to the hardware ADCMic block.</td></tr>
    <tr><td class="paramname">intrMask</td><td>The mask of interrupts to enable. Select one or more values from <a class="el" href="group__group__adcmic__macros__interrupt.html">Interrupt Masks</a> and "OR" them together.<ul>
<li><a class="el" href="group__group__adcmic__macros__interrupt.html#ga12534bf7abd85d583d06cc1579c4e562">CY_ADCMIC_INTR_DC</a></li>
<li><a class="el" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a></li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: Configure and enable the ADCMic interrupt. */</span></div><div class="line">    <span class="keyword">const</span> <a class="code" href="structcy__stc__sysint__t.html">cy_stc_sysint_t</a> ADCMic_IRQ_cfg =</div><div class="line">    {</div><div class="line">        .<a class="code" href="structcy__stc__sysint__t.html#a204a8f07adf056c8d3dd818136da853f">intrSrc</a>      = adcmic_interrupt_adcmic_IRQn, <span class="comment">/* Interrupt source is the ADCMic interrupt */</span></div><div class="line">        .intrPriority = 7UL                           <span class="comment">/* Interrupt priority is 7 */</span></div><div class="line">    };</div><div class="line">    </div><div class="line">    <span class="comment">/* Configure the interrupt with vector at ADCMic_Isr(). */</span></div><div class="line">    (void)<a class="code" href="group__group__sysint__functions.html#gab2ff6820a898e9af3f780000054eea5d">Cy_SysInt_Init</a>(&amp;ADCMic_IRQ_cfg, ADCMic_Isr);</div><div class="line"></div><div class="line">    <span class="comment">/* Enable the interrupt. */</span></div><div class="line">    NVIC_EnableIRQ(ADCMic_IRQ_cfg.<a class="code" href="structcy__stc__sysint__t.html#a204a8f07adf056c8d3dd818136da853f">intrSrc</a>);</div><div class="line">    </div><div class="line">    <span class="comment">/* Clear possible interrupt erroneously raised during block enabling */</span></div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#ga51c3d5c6bdc5fef18119977ded174a28">Cy_ADCMic_ClearInterrupt</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#gaa22987ec467c499e394cd707c2d69a42">CY_ADCMIC_INTR</a>);</div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#ga50aef66098e540a452357c81e0f06687">Cy_ADCMic_EnableInterrupt</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a>);</div></div><!-- fragment --></dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gad989e9e2543b9db8691cc90d485c49c4">&#9670;&nbsp;</a></span>Cy_ADCMic_DisableInterrupt()</h2>

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          <td class="memname">void Cy_ADCMic_DisableInterrupt </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>intrMask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clears the specified interrupt bit in the interrupt mask register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>The pointer to the hardware ADCMic block.</td></tr>
    <tr><td class="paramname">intrMask</td><td>The mask of interrupts to disable. Select one or more values from <a class="el" href="group__group__adcmic__macros__interrupt.html">Interrupt Masks</a> and "OR" them together.<ul>
<li><a class="el" href="group__group__adcmic__macros__interrupt.html#ga12534bf7abd85d583d06cc1579c4e562">CY_ADCMIC_INTR_DC</a></li>
<li><a class="el" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a></li>
</ul>
</td></tr>
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<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: Configure and enable the ADCMic interrupt. */</span></div><div class="line">    <span class="keyword">const</span> <a class="code" href="structcy__stc__sysint__t.html">cy_stc_sysint_t</a> ADCMic_IRQ_cfg =</div><div class="line">    {</div><div class="line">        .<a class="code" href="structcy__stc__sysint__t.html#a204a8f07adf056c8d3dd818136da853f">intrSrc</a>      = adcmic_interrupt_adcmic_IRQn, <span class="comment">/* Interrupt source is the ADCMic interrupt */</span></div><div class="line">        .intrPriority = 7UL                           <span class="comment">/* Interrupt priority is 7 */</span></div><div class="line">    };</div><div class="line">    </div><div class="line">    <span class="comment">/* Configure the interrupt with vector at ADCMic_Isr(). */</span></div><div class="line">    (void)<a class="code" href="group__group__sysint__functions.html#gab2ff6820a898e9af3f780000054eea5d">Cy_SysInt_Init</a>(&amp;ADCMic_IRQ_cfg, ADCMic_Isr);</div><div class="line"></div><div class="line">    <span class="comment">/* Enable the interrupt. */</span></div><div class="line">    NVIC_EnableIRQ(ADCMic_IRQ_cfg.<a class="code" href="structcy__stc__sysint__t.html#a204a8f07adf056c8d3dd818136da853f">intrSrc</a>);</div><div class="line">    </div><div class="line">    <span class="comment">/* Clear possible interrupt erroneously raised during block enabling */</span></div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#ga51c3d5c6bdc5fef18119977ded174a28">Cy_ADCMic_ClearInterrupt</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#gaa22987ec467c499e394cd707c2d69a42">CY_ADCMIC_INTR</a>);</div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#ga50aef66098e540a452357c81e0f06687">Cy_ADCMic_EnableInterrupt</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a>);</div></div><!-- fragment --></dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga1866ca19f250374956f6ed2bb0a55f4f">&#9670;&nbsp;</a></span>Cy_ADCMic_GetInterruptStatus()</h2>

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          <td class="memname">__STATIC_INLINE uint32_t Cy_ADCMic_GetInterruptStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> const *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
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<p>Returns the interrupt status of the specified channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>The pointer to the hardware ADCMic block.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The interrupt status.</dd></dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: Configure and enable the ADCMic interrupt. */</span></div><div class="line">    <span class="keyword">const</span> <a class="code" href="structcy__stc__sysint__t.html">cy_stc_sysint_t</a> ADCMic_IRQ_cfg =</div><div class="line">    {</div><div class="line">        .<a class="code" href="structcy__stc__sysint__t.html#a204a8f07adf056c8d3dd818136da853f">intrSrc</a>      = adcmic_interrupt_adcmic_IRQn, <span class="comment">/* Interrupt source is the ADCMic interrupt */</span></div><div class="line">        .intrPriority = 7UL                           <span class="comment">/* Interrupt priority is 7 */</span></div><div class="line">    };</div><div class="line">    </div><div class="line">    <span class="comment">/* Configure the interrupt with vector at ADCMic_Isr(). */</span></div><div class="line">    (void)<a class="code" href="group__group__sysint__functions.html#gab2ff6820a898e9af3f780000054eea5d">Cy_SysInt_Init</a>(&amp;ADCMic_IRQ_cfg, ADCMic_Isr);</div><div class="line"></div><div class="line">    <span class="comment">/* Enable the interrupt. */</span></div><div class="line">    NVIC_EnableIRQ(ADCMic_IRQ_cfg.<a class="code" href="structcy__stc__sysint__t.html#a204a8f07adf056c8d3dd818136da853f">intrSrc</a>);</div><div class="line">    </div><div class="line">    <span class="comment">/* Clear possible interrupt erroneously raised during block enabling */</span></div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#ga51c3d5c6bdc5fef18119977ded174a28">Cy_ADCMic_ClearInterrupt</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#gaa22987ec467c499e394cd707c2d69a42">CY_ADCMIC_INTR</a>);</div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#ga50aef66098e540a452357c81e0f06687">Cy_ADCMic_EnableInterrupt</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a>);</div></div><!-- fragment --></dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga51c3d5c6bdc5fef18119977ded174a28">&#9670;&nbsp;</a></span>Cy_ADCMic_ClearInterrupt()</h2>

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        <tr>
          <td class="memname">__STATIC_INLINE void Cy_ADCMic_ClearInterrupt </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>intrMask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clears the interrupt status. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>The pointer to the hardware ADC block.</td></tr>
    <tr><td class="paramname">intrMask</td><td>The mask of interrupts to clear. Typically this will be the value returned from <a class="el" href="group__group__adcmic__functions__interrupt.html#ga1866ca19f250374956f6ed2bb0a55f4f">Cy_ADCMic_GetInterruptStatus</a>. Alternately, select one or more values from <a class="el" href="group__group__adcmic__macros__interrupt.html">Interrupt Masks</a> and "OR" them together.<ul>
<li><a class="el" href="group__group__adcmic__macros__interrupt.html#ga12534bf7abd85d583d06cc1579c4e562">CY_ADCMIC_INTR_DC</a></li>
<li><a class="el" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a></li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: Configure and enable the ADCMic interrupt. */</span></div><div class="line">    <span class="keyword">const</span> <a class="code" href="structcy__stc__sysint__t.html">cy_stc_sysint_t</a> ADCMic_IRQ_cfg =</div><div class="line">    {</div><div class="line">        .<a class="code" href="structcy__stc__sysint__t.html#a204a8f07adf056c8d3dd818136da853f">intrSrc</a>      = adcmic_interrupt_adcmic_IRQn, <span class="comment">/* Interrupt source is the ADCMic interrupt */</span></div><div class="line">        .intrPriority = 7UL                           <span class="comment">/* Interrupt priority is 7 */</span></div><div class="line">    };</div><div class="line">    </div><div class="line">    <span class="comment">/* Configure the interrupt with vector at ADCMic_Isr(). */</span></div><div class="line">    (void)<a class="code" href="group__group__sysint__functions.html#gab2ff6820a898e9af3f780000054eea5d">Cy_SysInt_Init</a>(&amp;ADCMic_IRQ_cfg, ADCMic_Isr);</div><div class="line"></div><div class="line">    <span class="comment">/* Enable the interrupt. */</span></div><div class="line">    NVIC_EnableIRQ(ADCMic_IRQ_cfg.<a class="code" href="structcy__stc__sysint__t.html#a204a8f07adf056c8d3dd818136da853f">intrSrc</a>);</div><div class="line">    </div><div class="line">    <span class="comment">/* Clear possible interrupt erroneously raised during block enabling */</span></div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#ga51c3d5c6bdc5fef18119977ded174a28">Cy_ADCMic_ClearInterrupt</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#gaa22987ec467c499e394cd707c2d69a42">CY_ADCMIC_INTR</a>);</div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#ga50aef66098e540a452357c81e0f06687">Cy_ADCMic_EnableInterrupt</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a>);</div></div><!-- fragment --></dd></dl>

</div>
</div>
<a id="ga272790cd2069d78ddd1d436d31c7633f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga272790cd2069d78ddd1d436d31c7633f">&#9670;&nbsp;</a></span>Cy_ADCMic_SetInterrupt()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE void Cy_ADCMic_SetInterrupt </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>intrMask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Sets the interrupt for the specified channel. </p>
<p>Intended mostly for debugging.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>The pointer to the hardware ADCMic block.</td></tr>
    <tr><td class="paramname">intrMask</td><td>The mask of interrupts to set. Select one or more values from <a class="el" href="group__group__adcmic__macros__interrupt.html">Interrupt Masks</a> and "OR" them together.<ul>
<li><a class="el" href="group__group__adcmic__macros__interrupt.html#ga12534bf7abd85d583d06cc1579c4e562">CY_ADCMIC_INTR_DC</a></li>
<li><a class="el" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a> </li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga8ef98c24d5f9b40d34919521768bd99f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8ef98c24d5f9b40d34919521768bd99f">&#9670;&nbsp;</a></span>Cy_ADCMic_GetInterruptMask()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE uint32_t Cy_ADCMic_GetInterruptMask </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> const *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Returns the interrupt mask value of the specified channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>The pointer to the hardware ADCMic block.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The interrupt mask value.</dd></dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: Check whether a specific interrupt source is enabled. */</span>    </div><div class="line">    <span class="keywordflow">if</span> (0UL != (<a class="code" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a> &amp; <a class="code" href="group__group__adcmic__functions__interrupt.html#ga8ef98c24d5f9b40d34919521768bd99f">Cy_ADCMic_GetInterruptMask</a>(MXS40ADCMIC0)))</div><div class="line">    {</div><div class="line">        <span class="comment">/* DATA interrupt was enabled. */</span></div><div class="line">    }</div></div><!-- fragment --></dd></dl>

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<a id="gae267e077a5ea40b9c6af3aa9a8658719"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae267e077a5ea40b9c6af3aa9a8658719">&#9670;&nbsp;</a></span>Cy_ADCMic_SetInterruptMask()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE void Cy_ADCMic_SetInterruptMask </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>intrMask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Sets an interrupt mask value for the specified channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>The pointer to the hardware ADCMic block.</td></tr>
    <tr><td class="paramname">intrMask</td><td>The mask of interrupts. Select one or more values from <a class="el" href="group__group__adcmic__macros__interrupt.html">Interrupt Masks</a> and "OR" them together.<ul>
<li><a class="el" href="group__group__adcmic__macros__interrupt.html#ga12534bf7abd85d583d06cc1579c4e562">CY_ADCMIC_INTR_DC</a></li>
<li><a class="el" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a></li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: Enable the DATA and DC interrupt sources.</span></div><div class="line"><span class="comment">     * Make sure to assign an ISR to handle the ADCMic interrupts.</span></div><div class="line"><span class="comment">     */</span></div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#gae267e077a5ea40b9c6af3aa9a8658719">Cy_ADCMic_SetInterruptMask</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#ga12534bf7abd85d583d06cc1579c4e562">CY_ADCMIC_INTR_DC</a> | <a class="code" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a>);</div></div><!-- fragment --></dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gae9309c0b0b44c696c3de3a79290ec641">&#9670;&nbsp;</a></span>Cy_ADCMic_GetInterruptStatusMasked()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE uint32_t Cy_ADCMic_GetInterruptStatusMasked </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_m_x_s40_a_d_c_m_i_c___type.html">MXS40ADCMIC_Type</a> const *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Returns the logical AND of the corresponding INTR and INTR_MASK fields in a single-load operation. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>The pointer to the hardware ADCMic block.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The masked interrupt status.</dd></dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: Configure and enable the ADCMic interrupt. */</span></div><div class="line">    <span class="keyword">const</span> <a class="code" href="structcy__stc__sysint__t.html">cy_stc_sysint_t</a> ADCMic_IRQ_cfg =</div><div class="line">    {</div><div class="line">        .<a class="code" href="structcy__stc__sysint__t.html#a204a8f07adf056c8d3dd818136da853f">intrSrc</a>      = adcmic_interrupt_adcmic_IRQn, <span class="comment">/* Interrupt source is the ADCMic interrupt */</span></div><div class="line">        .intrPriority = 7UL                           <span class="comment">/* Interrupt priority is 7 */</span></div><div class="line">    };</div><div class="line">    </div><div class="line">    <span class="comment">/* Configure the interrupt with vector at ADCMic_Isr(). */</span></div><div class="line">    (void)<a class="code" href="group__group__sysint__functions.html#gab2ff6820a898e9af3f780000054eea5d">Cy_SysInt_Init</a>(&amp;ADCMic_IRQ_cfg, ADCMic_Isr);</div><div class="line"></div><div class="line">    <span class="comment">/* Enable the interrupt. */</span></div><div class="line">    NVIC_EnableIRQ(ADCMic_IRQ_cfg.<a class="code" href="structcy__stc__sysint__t.html#a204a8f07adf056c8d3dd818136da853f">intrSrc</a>);</div><div class="line">    </div><div class="line">    <span class="comment">/* Clear possible interrupt erroneously raised during block enabling */</span></div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#ga51c3d5c6bdc5fef18119977ded174a28">Cy_ADCMic_ClearInterrupt</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#gaa22987ec467c499e394cd707c2d69a42">CY_ADCMIC_INTR</a>);</div><div class="line">    <a class="code" href="group__group__adcmic__functions__interrupt.html#ga50aef66098e540a452357c81e0f06687">Cy_ADCMic_EnableInterrupt</a>(MXS40ADCMIC0, <a class="code" href="group__group__adcmic__macros__interrupt.html#ga1a3748aac7c1fb78f2860c7f36d643d6">CY_ADCMIC_INTR_DATA</a>);</div></div><!-- fragment --></dd></dl>

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